I am a fourth year PhD student at MIT CSAIL advised by Professor Daniel Sanchez and Professor Joel Emer. I work in computer architecture with a focus on accelerating irregular and sparse applications such as sparse neural networks, sparse tensor algebra, and graph analytics.

Before joining MIT, I received a bachelor’s degree in Mathematics and Physics from Tsinghua University in 2019, where I worked with Professor Leibo Liu. I did a summer internship at UC Berkeley working with Professor Kurt Keutzer. I also had industry internship at Apple.

You can access my curriculum vitae here.

Publications

ISOSceles: Accelerating Sparse CNNs through Inter-Layer Pipelining

Yifan Yang, Joel S. Emer, Daniel Sanchez
in Proceedings of the 29th international symposium on High Performance Computer Architecture (HPCA-29), 2023.
[paper] [slides] [poster]

SpZip: Architectural Support for Effective Data Compression In Irregular Applications

Yifan Yang, Joel S. Emer, Daniel Sanchez
in Proceedings of the 48th annual International Symposium on Computer Architecture (ISCA-48), 2021.
[paper] [slides] [lightning] [poster]

GraphABCD: Scaling Out Graph Analytics with Asynchronous Block Coordinate Descent

Yifan Yang, Zhaoshi Li, Yangdong Deng, Zhiwei Liu, Shouyi Yin, Shaojun Wei, Leibo Liu
in Proceedings of the 47th annual International Symposium on Computer Architecture (ISCA-47), 2020.
[paper] [slides] [lightning]

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs

Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees Vissers, John Wawrzynek, Kurt Keutzer
in Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2019.
[paper] [slides] [code]

Experience

Summer 2022: Platform Architecture Intern, Apple

CPU cache subsystem performance research

Spring 2022: Teaching Assistant, MIT

6.812/6.825 Hardware Architecture for Deep Learning